Dispositivos Digitales Programables 10A - Banda

 

 

 

 

  Felipe Neri Vital López

Armando Montes Tlahuiz

 García García Antonio Alberto Montes Tlahuiz Armando Romero Pérez Juan  Sampedro Morales Ismael Ortega Báez Marco Vital Felipe Neri   

 

 

  Felipe Neri Vital López 

Armando Montes Tlahuiz

library IEEE; use IEEE.STD_LOGIC_1164.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity RobotVHDL is     Port ( S1 : in  STD_LOGIC;            S2 : in  STD_LOGIC;            CLK : in  STD_LOGIC;            PWMa : out  STD_LOGIC;            PWMb : out  STD_LOGIC;            Reset : in  STD_LOGIC); end RobotVHDL; architecture Brazo of RobotVHDL is begin p1: process (CLK, Reset) variable Contador:integer range 0 to 1000000:=0; --Variable de conteo para el periodo T para cada servomotor (20ms). variable ComparacionS1: integer range 0 to 125000; variable ComparacionS2: integer range 0 to 125000; begin if(CLK='1' and CLK'event)then if (Reset='1')then --Reset de la entidad PWMa<='0'; PWMb<='0'; Con